Index of /tecedm/website/docs_generic

[ICO]NameLast modifiedSizeDescription

[PARENTDIR]Parent Directory  -  
[   ]TeamDHS.pdf2011-10-17 11:51 819K 
[   ]TeamSat.pdf2011-10-17 11:51 181K 
[   ]Turbo.pdf2011-10-17 11:51 73K 
[   ]UseOfVHDL.pdf2011-10-17 11:51 31K 
[   ]VHDLCore.pdf2011-10-17 11:51 76K 
[   ]VHDLReport.pdf2011-10-17 11:51 283K 
[   ]evi_datasheet01.pdf2011-10-17 11:51 841K 
[   ]PDFE.pdf2011-10-17 11:51 96K 
[   ]Petra.pdf2011-10-17 11:51 65K 
[   ]PetraFlyer.pdf2011-10-17 11:51 47K 
[   ]ReadOut.pdf2011-10-17 11:51 41K 
[   ]SmallSat.pdf2011-10-17 11:51 843K 
[   ]SmartSensor.pdf2011-10-17 11:51 181K 
[   ]SynthCore.pdf2011-10-17 11:51 165K 
[   ]T7905E.pdf2011-10-17 11:51 2.0M 
[   ]Iris.pdf2011-10-17 11:51 67K 
[   ]Micro8052.pdf2011-10-17 11:51 29K 
[   ]ModelGuide.pdf2011-10-17 11:51 247K 
[   ]ADV80S32_DataSheet_2.5.pdf2011-10-17 11:51 466K 
[   ]AGGA2Intro.pdf2011-10-17 11:51 108K 
[   ]AccVHDL.pdf2011-10-17 11:51 46K 
[   ]BoardLevel.pdf2011-10-17 11:51 271K 
[   ]CMOSSensor.pdf2011-10-17 11:51 477K 
[   ]DynamicBin.pdf2011-10-17 11:51 127K 
[   ]E2V10bitsADC.pdf2012-09-13 14:08 709K 
[   ]DAC-RP-KT-017_1_DAC-Summary-Report.pdf2012-10-16 14:08 3.3M 
[   ]AgendaFPGA_UG.pdf2012-10-30 09:45 116K 
[   ]MT_FinalRreport.pdf2013-04-08 20:52 2.6M 
[   ]DELTA_ExecutiveSummary.pdf2013-11-05 11:53 233K 
[   ]HWSW_codesign_Final_Report.pdf2014-06-25 16:16 2.7M 
[   ]ESA_PMCs_FinalReport.pdf2014-07-17 11:02 636K 
[   ]ESA_PMCs_ProposalReport.pdf2014-07-17 11:02 1.4M 
[   ]terma_sysc_FinalReport.pdf2014-12-02 11:49 279K 
[   ]ECSS-Q-HB-60-02MAPLD201505.pdf2015-06-08 09:45 1.3M 
[   ]ECSS-Q-HB-60-02A-DFR2Annex.pdf2015-11-19 17:27 126K 
[   ]ECSS-Q-HB-60-02AAcknowledgements.pdf2016-09-28 18:01 59K 
[   ]ECSS-Q-ST-60-02C31July2008.pdf2023-12-13 15:59 968K 
[   ]ECSS-Q-ST-60-03C(11October2023).pdf2023-12-13 15:59 1.0M 
[   ]ECSS-E-ST-20-40C(11October2023).pdf2023-12-13 15:59 2.5M 
[   ]ECSS-E-HB-20-40A(11October2023).pdf2023-12-13 15:59 7.0M 
[   ]New ECSS standards ASIC-FPGA-IP Core (for people NOT familiar with old std) 20240212.pdf2024-02-14 11:10 4.0M 
[   ]New ECSS standards ASIC-FPGA-IP Core (for people familiar with old std) 20240202.pdf2024-02-14 11:10 4.3M 
[   ]ECSS-Q-ST-60-03 9-2 Applicability Matrix V1.xlsx2024-02-14 11:11 25K 
[   ]Expected Outputs table.xlsx2024-02-14 11:11 16K 
[   ]E-ST-20-40 6-1 Pretailoring Table V1.xlsx2024-02-14 11:11 168K 
[IMG]Development Flow without outputs comparison with old std 20230828.jpg2024-02-14 11:13 4.8M 
[VID]webinar #2 (familiar with ECSS-Q-ST-60-02C).mp42024-02-26 18:26 2.5G 
[VID]webinar #1 (not familiar with ECSS-Q-ST-60-02C).mp42024-02-26 18:32 3.1G 
[   ]ECSS-E-ST-20-40C(11October2023) unprotected.pdf2024-06-26 16:12 2.1M 
[   ]ECSS-Q-ST-60-03C(11October2023) unprotected.pdf2024-06-26 16:12 1.2M